Thursday 31 July 2014

IEEE VLSI TITLES 2014-2015

IEEE VLSI TITLES 2014-15

S.NO
TITLE
DOMAIN
YEAR
             1          
Area-Delay-Power Efficient Fixed-Point LMS
Adaptive Filter With Low Adaptation-Delay
Area + Power + Delay Efficient
2014
           2         
Fast Sign Detection Algorithm for the RNS ModuliSet {2n+1 − 1, 2n − 1, 2n}
Area + Power + Delay Efficient
2014
           3         
Efficient Integer DCT Architectures for HEVC
Area + Power Efficient
2014
           4         
Area–Delay–Power Efficient Carry-Select Adder
Area + Power Efficient
2014
           5         
Design of Efficient Binary Comparators
in Quantum-Dot Cellular Automata
Area + Power Efficient
2014
           6         
Reverse Converter Design via Parallel-Prefix Adders:Novel Components, Methodology,
and Implementations
Delay + Power Efficient
2014
           7         
Area-Delay Efficient Binary Adders in QCA
Area +  Delay Efficient
2014
           8         
Low-Complexity Low-Latency Architecture for Matchingof Data EncodedWith Hard Systematic
Error-Correcting Codes
Area + DelayEfficient
2014
           9         
Multifunction Residue Architecturesfor Cryptography
Area Efficient
2014
          10     
Aging-Aware Reliable Multiplier Design With
Adaptive Hold Logic
High Speed
2014
          11     
Critical-Path Analysis and Low-Complexity
Implementation of the LMS Adaptive Algorithm
High Speed
2014
          12     
Eliminating Synchronization Latency Using
Sequenced Latching
High Speed
2014
          13     
Gate Mapping Automation for Asynchronous
NULL Convention Logic Circuits
Testing
2014
          14     
High-Throughput Multistandard Transform Core Supporting MPEG/H.264/VC-1 Using Common
Sharing Distributed Arithmetic
VLSI+
MATLAB
2014
          15     
Improved 8-Point Approximate DCT for Image andVideo Compression Requiring Only 14 Additions
VLSI+
MATLAB
2014
          16     
Efficient FPGA and ASIC Realizations ofDA-Based Reconfigurable FIR Digital Filter

VLSI+
MATLAB
2014

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