VLSI IEEE 2014 TITLES

VLSI IEEE 2014 TITLES

1.      Area–Delay–Power Efficient Carry-Select Adder

2.      Low-Power Pulse-Triggered Flip-Flop DesignBased on a Signal Feed-Through Scheme

3.      Low-Power Dual Dynamic Node Pulsed HybridFlip-Flop Featuring Efficient Embedded Logic

4.      Design of an Energy Efficient, High Speed, LowPower Full Subtractor Using GDI Technique

5.      A New Design of Low Power High Speed Hybrid CMOS FullAdder

6.      An Arithmetic and Logic Unit Optimized for Area and power

7.      Low Power Noise Tolerant Domino1-Bit Full Adder